Reference is made to FIG. 1 showing a circuit schematic for a prior art photosensitive cell 10 for an image sensor which includes an array of such cells 10 arranged in a matrix of rows and columns. The cell 10 includes a photodiode 12 having an anode that is connected to ground and a cathode connected to node 14. A transfer gate transistor 16 has a source terminal connected to node 14 and a drain terminal connected to node 18 which comprises a sense node. The gate of transfer gate transistor 16 is driven by a transfer gate control signal TG. The cell 10 further includes a reset transistor 20 having a drain terminal connected to a supply voltage node Vdd and a source terminal connected to the node 18. The gate of reset transistor 20 is driven by a reset signal RST. The node 18 is connected to the gate of a source follower transistor 22 having a drain terminal connected to the supply voltage node Vdd and a source terminal connected to node 24. A read transistor 28 has a drain terminal connected to node 24 and a source terminal connected to a column line 30 of the array of cells 10. The gate of read transistor 28 is driven by a read signal RD.
The cell 10 operates in a manner well known to those skilled in the art. Transistor 16 is turned off by signal TG and the photodiode 12 responds to illumination by generating charges at node 14. The transistor 28 is turned on to transfer voltage at node 18 to the column line 30. The reset transistor 20 is turned on by signal RST to precharge the voltage at node 18 to Vdd. The reset transistor 20 is then turned off and the transistor 16 is turned on. Stored charges are transferred from node 14 to node 18 and the voltage at node 18 falls to a level dependent on the strength of the illumination and the corresponding stored charges. The transistor 16 and the transistor 28 are then turned off.